aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelane
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 8 Apr 2020 06:53:47 +0000 (08:53 +0200)
committerMarge Bot <eric+marge@anholt.net>
Thu, 21 May 2020 15:06:48 +0000 (15:06 +0000)
commitaf7e2c61335640b4b23bdf907ea9ec94c89c218b
treec38bb43f70bded47b0197244d3b4f6045e0684c7
parent86e2b03e3f8862d52fd7ff0945eab423ba03ad26
aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelane

I would expect it to just work as intended and other solutions,
like v_and_b32 to make sure the upper bits are 0, might have some
overhead.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
src/amd/compiler/aco_validate.cpp