RISC-V: Support zicsr and zifencei extension for -march.
authorKito Cheng <kito.cheng@sifive.com>
Wed, 11 Nov 2020 06:04:34 +0000 (14:04 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Wed, 18 Nov 2020 07:02:22 +0000 (15:02 +0800)
commitb03be74bad08c382da47e048007a78fa3fb4ef49
tree80fe3a8af8a760238fb992f7859bbc643f428feb
parent6a5bb4705fb75fd3afdde938193c59938cc7bfde
RISC-V: Support zicsr and zifencei extension for -march.

 - CSR related instructions and fence instructions has to be splitted from
   baseline ISA, zicsr and zifencei are corresponding sub-extension.

gcc/ChangeLog:

* common/config/riscv/riscv-common.c (riscv_implied_info):
d and f implied zicsr.
(riscv_ext_flag_table): Handle zicsr and zifencei.
* config/riscv/riscv-opts.h (MASK_ZICSR): New.
(MASK_ZIFENCEI): Ditto.
(TARGET_ZICSR): Ditto.
(TARGET_ZIFENCEI): Ditto.
* config/riscv/riscv.md (clear_cache): Check TARGET_ZIFENCEI.
(fence_i): Ditto.
* config/riscv/riscv.opt (riscv_zi_subext): New.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/arch-8.c: New.
* gcc.target/riscv/attribute-14.c: Ditto.
gcc/common/config/riscv/riscv-common.c
gcc/config/riscv/riscv-opts.h
gcc/config/riscv/riscv.md
gcc/config/riscv/riscv.opt
gcc/testsuite/gcc.target/riscv/arch-8.c [new file with mode: 0644]
gcc/testsuite/gcc.target/riscv/attribute-14.c [new file with mode: 0644]