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(parent: 74a4926) | patch
arm: change MISCREG_L2ERRSR to warn not fail
authorDam Sunwoo <dam.sunwoo@arm.com>
Wed, 13 Aug 2014 10:57:36 +0000 (06:57 -0400)
committerDam Sunwoo <dam.sunwoo@arm.com>
Wed, 13 Aug 2014 10:57:36 +0000 (06:57 -0400)
commitb04d6c7c33d779654c5a4fc614be4e20de2010c6
tree59ba7d5a64077f6bf68bc6832dd856a269034c7dtree
parent74a4926fe0a92502ca98ca7656dca478d88eb2f1commit | diff
arm: change MISCREG_L2ERRSR to warn not fail

Some newer binaries compiled for Versatile Express TC2 contain access
to implementation specific L2MERRSR registers. This causes an infinite
loop of undefined exceptions. This patch changes the behavior to "warn
not fail" to keep the workloads going.
src/arch/arm/miscregs.cc diff | blob | history