Added "make PRETTY=1"
authorClifford Wolf <clifford@clifford.at>
Thu, 24 Jul 2014 15:15:01 +0000 (17:15 +0200)
committerClifford Wolf <clifford@clifford.at>
Thu, 24 Jul 2014 15:15:01 +0000 (17:15 +0200)
commitb17d6531c833f9064c5888c694aa24e8a395b72a
treef1cd2bd0044f938cd9371a63b5650df0e0fc20a7
parent2f54345cff3aea768bb89754654127a3b0ee58e9
Added "make PRETTY=1"
Makefile
frontends/ilang/Makefile.inc
frontends/verilog/Makefile.inc
passes/techmap/Makefile.inc
techlibs/common/Makefile.inc
techlibs/xilinx/Makefile.inc