[AArch64] Add SVE conditional floating-point unary patterns
This patch adds patterns to match conditional unary operations
on floating-point modes. At the moment we rely on combine to merge
separate arithmetic and vcond_mask operations, and since the latter
doesn't accept zero operands, we miss out on the opportunity to use
the movprfx /z alternative. (This alternative is tested by the ACLE
patches though.)
2019-08-14 Richard Sandiford <richard.sandiford@arm.com>
Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
gcc/
* config/aarch64/aarch64-sve.md
(*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_2): New pattern.
(*cond_<SVE_COND_FP_UNARY:optab><SVE_F:mode>_any): Likewise.
gcc/testsuite/
* gcc.target/aarch64/sve/cond_unary_1.c: Add tests for
floating-point types.
* gcc.target/aarch64/sve/cond_unary_2.c: Likewise.
* gcc.target/aarch64/sve/cond_unary_3.c: Likewise.
* gcc.target/aarch64/sve/cond_unary_4.c: Likewise.
Co-Authored-By: Kugan Vivekanandarajah <kuganv@linaro.org>
From-SVN: r274477