sim: Fix two bugs relating to software caching of PageTable entries.

sim: Fix two bugs relating to software caching of PageTable entries.

The existing implementation can read uninitialized data or stale information
from the cached PageTable entries.

1) Add a valid bit for the cache entries.  Simply using zero for the virtual
address to signify invalid entries is not sufficient.  Speculative, wrong-path
accesses frequently access page zero.  The current implementation would return
a uninitialized TLB entry when address zero was accessed and the PageTable
cache entry was invalid.

2) When unmapping/mapping/remaping a page, invalidate the corresponding
PageTable cache entry if one already exists.