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(parent: 463e5c7) | patch
hdl.ast: add Value.{as_signed,as_unsigned}.
authorwhitequark <whitequark@whitequark.org>
Thu, 6 Feb 2020 18:27:55 +0000 (18:27 +0000)
committerwhitequark <whitequark@whitequark.org>
Thu, 6 Feb 2020 18:27:55 +0000 (18:27 +0000)
commitb22b6c9cfba05b662015f0c3a73cd0a63d2d141f
tree374674b727bd3dd5ec9575e2bdcc9293e4a99f55tree
parent463e5c7c3f302d626ba22b52ce6c345969b733cdcommit | diff
hdl.ast: add Value.{as_signed,as_unsigned}.

Before this commit, there was no way to do so besides creating and
assigning an intermediate signal, which could not be extracted into
a helper function due to Module statefulness.

Fixes #292.
nmigen/back/pysim.py diff | blob | history
nmigen/back/rtlil.py diff | blob | history
nmigen/hdl/ast.py diff | blob | history
nmigen/test/test_hdl_ast.py diff | blob | history
nmigen/test/test_sim.py diff | blob | history