back.rtlil: emit \src attributes for processes via Switch and Assign.
authorwhitequark <cz@m-labs.hk>
Wed, 3 Jul 2019 16:27:54 +0000 (16:27 +0000)
committerwhitequark <cz@m-labs.hk>
Wed, 3 Jul 2019 16:27:54 +0000 (16:27 +0000)
commitb2481bdbc63bc06bae55e98a1916152210187a84
tree814f99b01c4b1bdb3f3c2776822f88d0779eae0f
parent2e4426f9b741929ef315c3128f47318afe63bed6
back.rtlil: emit \src attributes for processes via Switch and Assign.

The locations are unfortunately not very precise, but they provide
some improvement over status quo.
nmigen/back/rtlil.py
nmigen/hdl/ast.py
nmigen/hdl/dsl.py
nmigen/hdl/xfrm.py