dcache: Loads from non-cacheable PTEs load entire 64 bits
authorAnton Blanchard <anton@linux.ibm.com>
Fri, 10 Sep 2021 10:51:53 +0000 (20:51 +1000)
committerAnton Blanchard <anton@ozlabs.org>
Fri, 10 Sep 2021 10:51:53 +0000 (20:51 +1000)
commitb29c58f3d14e29bf1c61ab1a54e19f4303ee7de8
treee7c7249389e603c908d94c7f63f2da96dc5f01b5
parent09bd01a49e15e9de1382c666ef794e48df5d3ea7
dcache: Loads from non-cacheable PTEs load entire 64 bits

A non-cacheable load should only load the data requested and no more. We
do the right thing for real mode cache inhibited storage instructions,
but when loading through a non-cacheable PTE we load the entire 64 bits
regardless of the size.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
dcache.vhdl