i965/gen7: Increase the WM threads to hardware limits.
authorEric Anholt <eric@anholt.net>
Thu, 19 Jul 2012 05:58:15 +0000 (22:58 -0700)
committerEric Anholt <eric@anholt.net>
Fri, 20 Jul 2012 18:05:39 +0000 (11:05 -0700)
commitb2a44cde6468fb6065169194fe3a67b2f4738b71
tree3a94a35a6a1e60a0bad608b8c6787aafcb9ac986
parent8ab5842a6d992956ee365c0e0232c6e6b907863e
i965/gen7: Increase the WM threads to hardware limits.

This thread count is only supposed to be enabled when "WIZ Hashing Disable in
GT_MODE register enabled."  I've always been confused whether that means the
bit in the register should be 1 or 0.  For my IVB GT2's register 0x7008 value
of 0x0, this appears to work fine.

Improves l4d2 performance at 640x480 by 0.88 +/- 0.11% (n=88).  Improves
performance with rasterization at 1280x1024 by 1.45% +/- 0.36% (n=6).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_context.c