projects / riscv-isa-sim.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 6da01ea) | patch
swap #ifdef USING_NOREGS so that it is possible to redefine set_pc
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 7 Oct 2018 08:09:21 +0000 (09:09 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 7 Oct 2018 08:09:21 +0000 (09:09 +0100)
commitb3242f2a7a483bbb4bf54f8045730e6dcc012fbf
treed28c47a845bd5fcb1d5b6eadc69ea0b72576b95ctree
parent6da01eab5e40b1e91a7406e6f9ad5ff5ef50793dcommit | diff
swap #ifdef USING_NOREGS so that it is possible to redefine set_pc

to avoid having to modify the branch instructions the set_pc macro will
be #undefd and redefined to modify the predication target
riscv/insn_template_sv.cc diff | blob | history
Simple-V augmented version of spike