Merge pull request #363 from antmicro/litex-sim-ddr4
authorenjoy-digital <florent@enjoy-digital.fr>
Tue, 28 Jan 2020 14:36:24 +0000 (15:36 +0100)
committerGitHub <noreply@github.com>
Tue, 28 Jan 2020 14:36:24 +0000 (15:36 +0100)
commitb4b56db4e31fb8674c767f17ce4e9e851aed85ea
tree83f2ac2b6c1e60c891110c04f3a15a8472a6a181
parent0820adbda18ac1690a72557ac086020b749a376b
parentc02dd5e8f974dddf9f7ccbdf8290d9b928ae3989
Merge pull request #363 from antmicro/litex-sim-ddr4

tools/litex_sim: add ddr4 PhySettings