intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode
authorJason Ekstrand <jason.ekstrand@intel.com>
Tue, 15 Jan 2019 16:53:44 +0000 (10:53 -0600)
committerJason Ekstrand <jason.ekstrand@intel.com>
Fri, 1 Feb 2019 22:11:00 +0000 (16:11 -0600)
commitb4f0d062cd12b4f675bac900ac41d1085a79239a
treec03f0758fe55af2a6c0ebefa937e27a7020e09c9
parent79724a07562dae79f00005b61bda4664287989ee
intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode

Previously, we only applied the fix to shaders with a dispatch mode of
SIMD8 but the code it relies on for SIMD16 mode only applies to SIMD16
instructions.  If you have a SIMD8 instruction in a SIMD16 shader,
neither would trigger and the restriction could still be hit.

Fixes: 232ed8980217dd "i965/fs: Register allocator shoudn't use grf127..."
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/intel/compiler/brw_fs_reg_allocate.cpp