inorder-bpred: edits to handle non-delay-slot ISAs
authorKorey Sewell <ksewell@umich.edu>
Tue, 12 May 2009 19:01:14 +0000 (15:01 -0400)
committerKorey Sewell <ksewell@umich.edu>
Tue, 12 May 2009 19:01:14 +0000 (15:01 -0400)
commitb569f8f0ed8dcf32347f0d4f68d2d7572a5d1353
tree14b4f11266600c44ec4c1846665277115911b363
parent1c8dfd92543aba5f49e464b17e7e8143fc01a58c
inorder-bpred: edits to handle non-delay-slot ISAs
Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline
src/arch/alpha/process.cc
src/cpu/inorder/inorder_dyn_inst.hh
src/cpu/inorder/pipeline_stage.cc
src/cpu/inorder/resources/bpred_unit.cc
src/cpu/inorder/resources/branch_predictor.cc
src/cpu/inorder/resources/execution_unit.cc
src/cpu/inorder/resources/fetch_seq_unit.cc
src/cpu/o3/thread_context.hh