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litedram: Add stash buffer to the L2 cache wishbone interface
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>
Wed, 10 Jun 2020 06:47:18 +0000 (16:47 +1000)
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>
Fri, 12 Jun 2020 11:01:34 +0000 (21:01 +1000)
commitb58ff724f6c87aa57b093d41ab1b951d9edcbf8e
treed0775a86e7df829dfe75848941d7c24fea904ecetree
parentb23fd6c5f16b6a8effb31b0816e635c39fd9a44ecommit | diff
litedram: Add stash buffer to the L2 cache wishbone interface

This breaks the long stall signal coming back to the processor
and helps improve overall timing.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
litedram/extras/litedram-wrapper-l2.vhdl diff | blob | history