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aarch64: Add an extra sbfiz pattern [PR87763]
authorRichard Sandiford <richard.sandiford@arm.com>
Mon, 3 Feb 2020 21:12:35 +0000 (21:12 +0000)
committerRichard Sandiford <richard.sandiford@arm.com>
Thu, 6 Feb 2020 17:26:59 +0000 (17:26 +0000)
commitb65a1eb3fae53f2e1ea1ef8c1164f490d55855a1
treeae82e4a261990680af6789d0c4369270e977a0e2tree
parent88ec0e8dbe6be8ac466c15ee057a8b1d4926fa8ecommit | diff
aarch64: Add an extra sbfiz pattern [PR87763]

This patch matches another form of sbfiz, in which the input
has DImode and the output has SImode.  It fixes a regression
in gcc.target/aarch64/lsl_asr_sbfiz.c from GCC 8.

2020-02-06  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
PR rtl-optimization/87763
* config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
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gcc/config/aarch64/aarch64.md diff | blob | history