Add Tercel support to Arty
authorRaptor Engineering Development Team <support@raptorengineering.com>
Wed, 23 Feb 2022 01:05:13 +0000 (19:05 -0600)
committerRaptor Engineering Development Team <support@raptorengineering.com>
Wed, 23 Feb 2022 01:05:13 +0000 (19:05 -0600)
commitb67f1fdb9ff2561060fce855083c8ceae43be071
treec658ba89350d48cbf72adc3e9488303730ad8826
parente04d79005b2d9da70dba49e54845c8fca2421ea6
Add Tercel support to Arty

NOTE: Untested due to lack of hardware and lack of access
to proprietary Xilinx toolchains
fpga/top-arty.vhdl