x86/Intel: correct AVX512 S/G disassembly
authorJan Beulich <jbeulich@suse.com>
Wed, 10 Mar 2021 07:20:29 +0000 (08:20 +0100)
committerJan Beulich <jbeulich@suse.com>
Wed, 10 Mar 2021 07:20:29 +0000 (08:20 +0100)
commitb763d508db481ae3721a80392a1b02e681662d23
tree50d6d05f1615ced1e73ab98c6392a5e483e199a3
parent32e31ad7da96b36879a64235f73926a7f83be4e0
x86/Intel: correct AVX512 S/G disassembly

Commit 6ff00b5e12e7 ("x86/Intel: correct permitted operand sizes for
AVX512 scatter/gather") brought the assembler side of AVX512 S/G insn
handling in line with AVX2's, but the disassembler side was forgotten.
This has the benefit of
- allowing to fold a number of table entries,
- rendering a few #define-s and enumerators unused.
13 files changed:
gas/ChangeLog
gas/testsuite/gas/i386/avx512f-intel.d
gas/testsuite/gas/i386/avx512f_vl-intel.d
gas/testsuite/gas/i386/avx512pf-intel.d
gas/testsuite/gas/i386/x86-64-avx512f-intel.d
gas/testsuite/gas/i386/x86-64-avx512f_vl-intel.d
gas/testsuite/gas/i386/x86-64-avx512pf-intel.d
opcodes/ChangeLog
opcodes/i386-dis-evex-len.h
opcodes/i386-dis-evex-reg.h
opcodes/i386-dis-evex-w.h
opcodes/i386-dis-evex.h
opcodes/i386-dis.c