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(parent: 0903806) | patch
RISC-V: Correct printing of MSTATUS and MISA.
authorJim Wilson <jimw@sifive.com>
Thu, 13 Dec 2018 18:48:23 +0000 (10:48 -0800)
committerJim Wilson <jimw@sifive.com>
Thu, 13 Dec 2018 18:48:23 +0000 (10:48 -0800)
commitb7c8601a7f2874de1bbe0dc38ef86ea053593ad8
tree4bec21273d6338db77a47fb9aeaabc743fe7caeatree
parent09038062534606ef9100b5474d136f7d2e543de4commit | diff
RISC-V: Correct printing of MSTATUS and MISA.

* riscv-tdep.c (riscv_print_one_register_info): For MSTATUS, add
comment for SD field, and correct xlen calculation.  For MISA, add
comment for MXL field, add call to register_size, and correct base
calculation.
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