MSP430: Fix simulator execution of RRUX instruction
authorJozef Lawrynowicz <jozef.l@mittosystems.com>
Wed, 22 Jan 2020 21:44:54 +0000 (21:44 +0000)
committerJozef Lawrynowicz <jozef.l@mittosystems.com>
Wed, 22 Jan 2020 21:52:29 +0000 (21:52 +0000)
commitb7dcc42dfde12c3a1ccb7149b3cf8ef2f0992ea3
treec2a177ad023f97f05bedfaa9271e035e371d6a09
parentbe4c5e58bdc839898739e0332aee84abf6e5299a
MSP430: Fix simulator execution of RRUX instruction

The MSP430X RRUX instruction (unsigned right shift) is synthesized as
the RRC (rotate right through carry) instruction, but with the ZC
(zero carry) bit of the opcode extention word set.

Ensure the carry flag is ignored when the ZC bit is set.

sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* msp430-sim.c (msp430_step_once): Ignore the carry flag when executing
an RRC instruction, if the ZC bit of the extension word is set.

sim/testsuite/sim/msp430/ChangeLog:

2020-01-22  Jozef Lawrynowicz  <jozef.l@mittosystems.com>

* rrux.s: New test.
sim/msp430/ChangeLog
sim/msp430/msp430-sim.c
sim/testsuite/sim/msp430/ChangeLog
sim/testsuite/sim/msp430/rrux.s [new file with mode: 0644]