loadstore1: Separate address calculation for MMU to ease timing
authorPaul Mackerras <paulus@ozlabs.org>
Mon, 13 Jul 2020 07:43:52 +0000 (17:43 +1000)
committerPaul Mackerras <paulus@ozlabs.org>
Mon, 20 Jul 2020 04:29:14 +0000 (14:29 +1000)
commitb80e81e1234022c9c22725489b5031dc6e6b06ab
tree8a4e5ff0226efb39a33c635ee1f8e56a2dfa5bfe
parent91cbeee77cfebe1da3d9484d34b3c72af90d444b
loadstore1: Separate address calculation for MMU to ease timing

This computes the address sent to the MMU separately from that sent
to the dcache.  This means that the address sent to the MMU doesn't
have the delay through the lsu_sum adder, making it available earlier.
The path through the lsu_sum adder and through the MMU to the MMU
done and err outputs showed up as a critical path on some builds.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
loadstore1.vhdl