arch-arm: Implement AArch64 ID regs as bitunions

arch-arm: Implement AArch64 ID regs as bitunions

This patch is implementing the following AArch64 ID registers as
bitunions, so that it is easier to query for feature availability:

- ID_AA64DFR0_EL1
- ID_AA64ISAR0_EL1
- ID_AA64ISAR1_EL1
- ID_AA64MMFR1_EL1
- ID_AA64MMFR2_EL1
- ID_AA64PFR0_EL1

They are updated to the latest Armv8.5 arch release version.
RES0 only ID registers like ID_AA64AFR1_EL1 haven't been added.

Change-Id: Ied037abe3757421bcfc2834d397a8cf9a2b9f0a7
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/13067
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>