projects / libre-riscv-dev.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 1863e74) | patch
[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be...
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Mon, 1 Jun 2020 11:46:27 +0000 (11:46 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Mon, 1 Jun 2020 11:46:29 +0000 (12:46 +0100)
commitba03168f1bf1ad9e31a2a18a332d228e7ca51011
tree92cc3e1e72b22d83555ed3325cb99bc78afbcad9tree
parent1863e744c793daa3d693d1fe67f5f6b878b09e7bcommit | diff
[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero
bc/11a94eedc81a6ebee835b9e2ec7bc432315522 [new file with mode: 0644] blob
Libre RISC-V Mailing list Archives (accessible via public-inbox)