aarch64: Use the MUL VL form of SVE PRF[BHWD]
authorRichard Sandiford <richard.sandiford@arm.com>
Mon, 4 Jan 2021 11:56:19 +0000 (11:56 +0000)
committerRichard Sandiford <richard.sandiford@arm.com>
Mon, 4 Jan 2021 11:56:19 +0000 (11:56 +0000)
commitba15b0fa0df773a90374f6b06775534ecd9f7b43
tree3078cd44e0b40fd352c2e8e20578fc57d5f96404
parent0926259f9fc21a7f1e09f45f8aede156ef249585
aarch64: Use the MUL VL form of SVE PRF[BHWD]

The expansions of the svprf[bhwd] instructions weren't taking
advantage of the immediate addressing mode.

gcc/
* config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
(offset_6bit_unsigned_scaled_p): Fix typo in comment.
(aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
[-32, 31].

gcc/testsuite/
* gcc.target/aarch64/sve/acle/asm/prfb.c: Test for a MUL VL range of
[-32, 31].
* gcc.target/aarch64/sve/acle/asm/prfh.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfw.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/prfd.c: Likewise.
gcc/config/aarch64/aarch64.c
gcc/testsuite/gcc.target/aarch64/sve/acle/asm/prfb.c
gcc/testsuite/gcc.target/aarch64/sve/acle/asm/prfd.c
gcc/testsuite/gcc.target/aarch64/sve/acle/asm/prfh.c
gcc/testsuite/gcc.target/aarch64/sve/acle/asm/prfw.c