ld: pru: Add optional section alignments

ld: pru: Add optional section alignments

The Texas Instruments SoCs with AARCH64 host processors have stricter
alignment requirements than ones with ARM32 host processors.  It's not
only the requirement for resource_table to be aligned to 8.  But also
any loadable segment size must be a multiple of 4 [1].

The current PRU default linker script may output a segment size not
aligned to 4, which would cause firmware load failure on AARCH64 hosts.

Fix this by using COMMONPAGESIZE and MAXPAGESIZE to signify respectively
the section memory size requirement and the resource table section's
start address alignment.  This would avoid penalizing the ARM32 hosts,
for which the default values (1 and 1) are sufficient.

For AARCH64 hosts, the alignments would be overwritten from GCC spec
files using the linker command line, e.g.:
  -z common-page-size=4 -z max-page-size=8

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/remoteproc/pru_rproc.c?h=v6.1#n555

ld/ChangeLog:

	* scripttempl/pru.sc (_data_end): Remove the alignment.
	(.data): Align output section size to COMMONPAGESIZE.
	(.resource_table): Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>