Fix problems with unCacheable addresses in timing-coherence
authorRon Dreslinski <rdreslin@umich.edu>
Thu, 12 Oct 2006 17:33:21 +0000 (13:33 -0400)
committerRon Dreslinski <rdreslin@umich.edu>
Thu, 12 Oct 2006 17:33:21 +0000 (13:33 -0400)
commitba4c224c390916fb489aa7179655c71d7fca1e13
tree6c02f9acfeb257791c30ad995cc75a0d382e94b8
parent78aec04b660544ea7af80d76912b4422c4426602
Fix problems with unCacheable addresses in timing-coherence

src/base/traceflags.py:
src/mem/physical.cc:
    Add debug falgs fro physical memory accesses
src/mem/cache/cache_impl.hh:
    Snoops to uncacheable blocks should not happen
src/mem/cache/miss/miss_queue.cc:
    Set the size properly on unCacheable accesses

--HG--
extra : convert_revision : fc78192863afb11fc7c591fba169021b9e127d16
src/base/traceflags.py
src/mem/cache/cache_impl.hh
src/mem/cache/miss/miss_queue.cc
src/mem/physical.cc