arch-power: Use 64-bit registers and operands
authorSandipan Das <sandipan@linux.ibm.com>
Sat, 6 Feb 2021 11:42:32 +0000 (17:12 +0530)
committerSandipan Das <sandipan@linux.ibm.com>
Mon, 15 Feb 2021 08:32:37 +0000 (14:02 +0530)
commitba65e0108edb4c7d47af02916818f801d0ef91b2
tree0951ac21126599a19ad2018a142d08817aa24d63
parent5a47a830d38388c6bd3721c12f253a3a90cf2cf4
arch-power: Use 64-bit registers and operands

This increases the width of the general-purpose registers
and some of the special purpose registers to 64 bits in
accordance with the newer versions of the Power ISA and
enables usage in both 32-bit and 64-bit execution modes.
In 32-bit mode, the use of upper word is dependent on the
instruction being executed and in some cases this may be
undefined.

Change-Id: I2a5865a66e4ceab45e42a833d425abdd6bd6bf55
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
src/arch/power/insts/integer.hh
src/arch/power/isa/operands.isa