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(parent: 9c6f76f) | patch
targets/sim: add EtherboneSoC target (allow accessing wishbone over in simulation...
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 19 Sep 2018 17:17:32 +0000 (19:17 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Wed, 19 Sep 2018 17:17:32 +0000 (19:17 +0200)
commitbadd99246934610fb20b8b5b7f7da64007030f0f
treebd4179f7ee82b172040914fc3e63ec006c11e6e0tree
parent9c6f76f18c17cf1d20bb2622fa17daefbb42d5adcommit | diff
targets/sim: add EtherboneSoC target (allow accessing wishbone over in simulation with litex_server)
litex/boards/targets/sim.py diff | blob | history