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(parent: 8949d27) | patch
anv: implement gen12 post sync pipe control workaround
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Wed, 15 Jan 2020 12:09:26 +0000 (14:09 +0200)
committerMarge Bot <eric+marge@anholt.net>
Wed, 5 Feb 2020 00:25:48 +0000 (00:25 +0000)
commitbcb611361b08528b14d3c5827ee2c4b21de1199d
tree0dd7a620051d76991af1cf4200cc4cbd659fbf93tree
parent8949d27bb8b4385e92049c18f728bdcf0a79b093commit | diff
anv: implement gen12 post sync pipe control workaround

Same as Skylake.

v2: Restrict to A0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3405>
src/intel/vulkan/genX_cmd_buffer.c diff | blob | history