radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Wed, 18 Mar 2020 20:57:31 +0000 (21:57 +0100)
committerPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tue, 24 Mar 2020 07:05:12 +0000 (08:05 +0100)
commitbd6234f24be024556a4b83e879bb65b89fea7a12
tree4062b5db3b56ceb5db0d2ff2eb07dd3a4989f1d5
parent67a10ea21596b2dff3ea2dc40713e59784e02ef2
radeonsi: clarify the conditions when FLUSH_AND_INV_DB is needed

FLUSH_AND_INV_DB should be done when we're changing surface state
registers of a bound depth target.

When depth_clear_value changes, si_state will modify
S_028038_ZRANGE_PRECISION so we need to flush the DB caches.

Verified with the captures from bugs cited below.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1283
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1330
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4263>
src/gallium/drivers/radeonsi/si_clear.c
src/gallium/drivers/radeonsi/si_debug_options.h
src/util/00-mesa-defaults.conf