i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT
authorSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Mon, 13 Jun 2016 06:29:53 +0000 (08:29 +0200)
committerSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Fri, 17 Jun 2016 09:33:18 +0000 (11:33 +0200)
commitbdab572a86f27b92ba10124f85d278e9c8861fff
tree93a3938893bd9ab6d148b1ffda97f8fdb82dbb51
parent0177dbb6c2fe876a9761a4a97eec44accfa4c007
i965/fs: indirect addressing with doubles is not supported in CHV/BSW/BXT

From the Cherryview's PRM, Volume 7, 3D Media GPGPU Engine, Register Region
Restrictions, page 844:

  "When source or destination datatype is 64b or operation is integer DWord
   multiply, indirect addressing must not be used."

v2:
- Fix it for Broxton too.

v3:
- Simplify code by using subscript() and not creating a new num_components
variable (Kenneth).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95462
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
src/mesa/drivers/dri/i965/brw_fs_nir.cpp