Unify Xilinx platforms into a single class, support more devices
authorMarcelina Koƛcielnicka <mwk@0x04.net>
Wed, 16 Dec 2020 15:35:57 +0000 (16:35 +0100)
committerwhitequark <whitequark@whitequark.org>
Sat, 25 Sep 2021 05:04:06 +0000 (05:04 +0000)
commitbdbe8bff271e65bf87b3cb5442b762798c254066
tree2ef53f42df3dffd1b403fd3053e51c03550c69e2
parentda8a492be72ebda5a611dced8237a34b67ca3d9f
Unify Xilinx platforms into a single class, support more devices

This merges existing code, and also adds support for:

- Virtex, Virtex E (also known as Spartan 2, Spartan 2E)
- Virtex 2, Virtex 2 Pro
- Spartan 3, Spartan 3E (in addition to existing Spartan 3A, Spartan 3A
  DSP support)
- Virtex 4
- Virtex 5
- Virtex 6
- ISE synthesis for Series 7

Fixes #552.
nmigen/vendor/xilinx.py [new file with mode: 0644]
nmigen/vendor/xilinx_7series.py
nmigen/vendor/xilinx_spartan_3_6.py
nmigen/vendor/xilinx_ultrascale.py