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(parent: e7d230e) | patch
x86: Setup correct TSL/TR segment attributes on INIT
authorAndreas Sandberg <andreas@sandberg.pp.se>
Mon, 3 Mar 2014 13:44:57 +0000 (14:44 +0100)
committerAndreas Sandberg <andreas@sandberg.pp.se>
Mon, 3 Mar 2014 13:44:57 +0000 (14:44 +0100)
commitbe246cef6251113ad25f59cfef37b746c80b11c5
tree69f072c0f332de811706fa95c49f233d2f65f79dtree
parente7d230ede0deb239271a25d227a792ae615daee2commit | diff
x86: Setup correct TSL/TR segment attributes on INIT

The TSL/LDT & TR/TSS segments didn't contain valid attributes. This
caused problems when transfering the state into KVM where invalid
state is a no-go. Fixup the attributes with values from AMD's
architecture programmer's manual.
src/arch/x86/faults.cc diff | blob | history