gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface
authorJordan Justen <jordan.l.justen@intel.com>
Tue, 9 Jul 2013 22:36:32 +0000 (15:36 -0700)
committerJordan Justen <jordan.l.justen@intel.com>
Sun, 4 Aug 2013 18:52:37 +0000 (11:52 -0700)
commitbf25ee284045c5d2ddf3b2d234d7344187e6da29
tree9167aebdbd5cddf1f457747d39ec622b44b0674c
parentf3c886be1f53a29377af4649876f0d90418764a9
gen7 depth surface: program 3DSTATE_DEPTH_BUFFER to top of surface

Previously we would always find the 2D sub-surface of interest,
and then program the surface to this location. Now we always
program the 3DSTATE_DEPTH_BUFFER at the start of the surface.
To select the lod/slice, we utilize the lod & minimum array
element fields.

As part of this change, we must revert 1f112ccf:
Revert "i965/gen7: Align all depth miplevels to 8 in the X direction."

We also must disable brw_workaround_depthstencil_alignment for
gen >= 7. Now the hardware will handle alignment when rendering
to additional slices/LODs.

v2:
 * Merge with recent MOCS changes

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
src/mesa/drivers/dri/i965/brw_misc_state.c
src/mesa/drivers/dri/i965/brw_tex_layout.c
src/mesa/drivers/dri/i965/gen7_blorp.cpp
src/mesa/drivers/dri/i965/gen7_misc_state.c