fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsubs and SVP64 tests
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Jun 2021 17:43:18 +0000 (18:43 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Tue, 15 Jun 2021 17:43:18 +0000 (18:43 +0100)
commitbf92dfb8ddf7d5f572a9f34b1daecafd1fe0a9f7
tree8a4e808cdcd3106989ee3575b9f162477a9197a1
parentf337cdd415bc22946e7e75c84c7ea82ec5aa3103
fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsubs and SVP64 tests
openpower/isatables/RM-1P-3S1D.csv
src/openpower/decoder/isa/test_caller_svp64_fp.py
src/openpower/decoder/isa/test_caller_svp64_mapreduce.py
src/openpower/sv/sv_analysis.py