RISC-V: Add support for the Zvbc extension
authorNathan Huckleberry <nhuck@google.com>
Fri, 30 Jun 2023 20:43:40 +0000 (22:43 +0200)
committerJeff Law <jlaw@ventanamicro>
Sat, 1 Jul 2023 13:28:34 +0000 (07:28 -0600)
commitc0a98a853d5ccde35dca20ad5d7cea0a70e16d56
tree5a5c318686f441523224c6657ee51419069c38ff
parentc8cb37347fde3ae12c943c2133a1043eece4c127
RISC-V: Add support for the Zvbc extension

Zvbc is part of the crypto vector extensions.

This extension adds the following instructions:
- vclmul.[vv,vx]
- vclmulh.[vv,vx]

bfd/ChangeLog:

* elfxx-riscv.c (riscv_multi_subset_supports): Add instruction
class support for Zvbc.
(riscv_multi_subset_supports_ext): Likewise.

gas/ChangeLog:

* testsuite/gas/riscv/zvbc.d: New test.
* testsuite/gas/riscv/zvbc.s: New test.

include/ChangeLog:

* opcode/riscv-opc.h (MATCH_VCLMUL_VV): New.
(MASK_VCLMUL_VV): New.
(MATCH_VCLMUL_VX): New.
(MASK_VCLMUL_VX): New.
(MATCH_VCLMULH_VV): New.
(MASK_VCLMULH_VV): New.
(MATCH_VCLMULH_VX): New.
(MASK_VCLMULH_VX): New.
(DECLARE_INSN): New.
* opcode/riscv.h (enum riscv_insn_class): Add instruction class
  support for Zvbc.

opcodes/ChangeLog:

* riscv-opc.c: Add Zvbc instruction.

Signed-off-by: Nathan Huckleberry <nhuck@google.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
bfd/elfxx-riscv.c
gas/testsuite/gas/riscv/zvbc.d [new file with mode: 0644]
gas/testsuite/gas/riscv/zvbc.s [new file with mode: 0644]
include/opcode/riscv-opc.h
include/opcode/riscv.h
opcodes/riscv-opc.c