build/sim: allow for arbitrary clocks generation using clockers
authorJędrzej Boczar <jboczar@antmicro.com>
Mon, 3 Aug 2020 14:52:54 +0000 (16:52 +0200)
committerJędrzej Boczar <jboczar@antmicro.com>
Mon, 3 Aug 2020 15:06:38 +0000 (17:06 +0200)
commitc1ae7e596c3e11db309659c8bfc197ebdeec14c5
treec1b34518506c7a2344d6717aa66297b1b01efaef
parent38054874ac1dc80f75faca9b9af590a4754b9fff
build/sim: allow for arbitrary clocks generation using clockers
litex/build/sim/config.py
litex/build/sim/core/modules.h
litex/build/sim/core/modules/clocker/clocker.c
litex/build/sim/core/sim.c
litex/build/sim/core/veril.cpp
litex/build/sim/core/veril.h
litex/tools/litex_sim.py