base: Extend AddrRange to support more flexible addressing
authorNikos Nikoleris <nikos.nikoleris@arm.com>
Sun, 26 May 2019 22:33:48 +0000 (23:33 +0100)
committerNikos Nikoleris <nikos.nikoleris@arm.com>
Mon, 10 Jun 2019 17:36:55 +0000 (17:36 +0000)
commitc1b7a40893e4b8f4601a5d8d449dd08ec59c0b2b
tree5e376b6b937343529ffd3e11061cbca7b50d30a6
parent61865650cdadccb54b6001554c9b3cb1aa3e6665
base: Extend AddrRange to support more flexible addressing

Previously an AddrRange could express interleaving using a number of
consecutive bits and in additional optionally a second number of
consecutive bits. The two sets of consecutive bits would be xored and
matched against a value to determine if an address is in the
AddrRange. For example:

sel[0] = a[8] ^ a[12]
sel[1] = a[9] ^ a[13]
where sel == intlvMatch

This change extends AddrRange to allow more flexible interleavings
with an abritary number of set of bits which do not need be
consecutive. For example:

sel[0] = a[8] ^ a[11] ^ a[13]
sel[1] = a[15] ^ a[17] ^ a[19]
where sel == intlvMatch

Change-Id: I42220a6d5011a31f0560535762a25bfc823c3ebb
Signed-off-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/19130
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
src/base/addr_range.hh
src/python/pybind11/core.cc