intel/nir: Lower memory access bit sizes later
authorJason Ekstrand <jason@jlekstrand.net>
Sat, 28 Mar 2020 04:33:27 +0000 (23:33 -0500)
committerMarge Bot <eric+marge@anholt.net>
Fri, 3 Apr 2020 20:26:54 +0000 (20:26 +0000)
commitc1bcb025dba7b73a865916dcda616d0479c94476
tree1049eba54d5cfb85526afd2ac649c0e85dbb1b5d
parentf1883cc73d4ea2c6d3a73dfe55c8b346f3ef8ac6
intel/nir: Lower memory access bit sizes later

We're about to do load/store vectorization right before this but we need
that to happen after we've done a round of optimization.  Otherwise,
we'll be getting unoptimized NIR in from ANV and the vectorizer won't be
able to do anything with it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4367>
src/intel/compiler/brw_nir.c