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(parent: fcb274a) | patch
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
authordh73 <dh73_fpga@qq.com>
Thu, 6 Apr 2017 04:01:29 +0000 (23:01 -0500)
committerdh73 <dh73_fpga@qq.com>
Thu, 6 Apr 2017 04:01:29 +0000 (23:01 -0500)
commitc27dcc1e47fa00cd415893c9d3f637a5d5865988
treef474149e35f09f18cc6ff701ec03c667bd76477ctree
parentfcb274a5644016c4090cdfbfbd795f311a7e58f5commit | diff
Add initial support for both MAX10 and Cyclone IV (E|GX) FPGAs
25 files changed:
examples/intel/DE2i-150/quartus_compile/de2i.qpf [new file with mode: 0644] blob
examples/intel/DE2i-150/quartus_compile/de2i.qsf [new file with mode: 0644] blob
examples/intel/DE2i-150/quartus_compile/runme_quartus [new file with mode: 0644] blob
examples/intel/DE2i-150/run_cycloneiv [new file with mode: 0644] blob
examples/intel/DE2i-150/sevenseg.v [new file with mode: 0644] blob
examples/intel/DE2i-150/top.v [new file with mode: 0644] blob
examples/intel/MAX10/run_max10 [new file with mode: 0644] blob
examples/intel/MAX10/runme_postsynth [new file with mode: 0644] blob
examples/intel/MAX10/sevenseg.v [new file with mode: 0644] blob
examples/intel/MAX10/top.v [new file with mode: 0644] blob
examples/intel/asicworld_lfsr/README [new file with mode: 0644] blob
examples/intel/asicworld_lfsr/lfsr_updown.v [new file with mode: 0644] blob
examples/intel/asicworld_lfsr/lfsr_updown_tb.v [new file with mode: 0644] blob
examples/intel/asicworld_lfsr/run_cycloneiv [new file with mode: 0755] blob
examples/intel/asicworld_lfsr/run_max10 [new file with mode: 0755] blob
examples/intel/asicworld_lfsr/runme_postsynth [new file with mode: 0755] blob
examples/intel/asicworld_lfsr/runme_presynth [new file with mode: 0755] blob
techlibs/altera_intel/Makefile.inc [new file with mode: 0644] blob
techlibs/altera_intel/cycloneiv/cells_comb_cycloneiv.v [new file with mode: 0644] blob
techlibs/altera_intel/cycloneiv/cells_map_cycloneiv.v [new file with mode: 0644] blob
techlibs/altera_intel/lpm_functions.v [new file with mode: 0644] blob
techlibs/altera_intel/max10/cells_arith_max10.v [new file with mode: 0644] blob
techlibs/altera_intel/max10/cells_comb_max10.v [new file with mode: 0644] blob
techlibs/altera_intel/max10/cells_map_max10.v [new file with mode: 0644] blob
techlibs/altera_intel/synth_intel.cc [new file with mode: 0644] blob