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(parent: 8727253) | patch
radv: Fix L2 cache rinse programming.
authorTimur Kristóf <timur.kristof@gmail.com>
Thu, 26 Sep 2019 07:37:16 +0000 (09:37 +0200)
committerBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Thu, 26 Sep 2019 22:18:16 +0000 (22:18 +0000)
commitc372dc762dac1c0bdf27b5cba112b61c15b8f862
tree0ae578426d2e1b42fd228b435fb1ecea4a42d3b2tree
parent8727253329849bef892ad5c0ba9bc620190ac3aecommit | diff
radv: Fix L2 cache rinse programming.

According to radeonsi, GLM doesn't support WB alone, so
we have to set INV too when WB is set.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/si_cmd_buffer.c diff | blob | history