git.libre-soc.org Git - gem5.git/commit

author	Steve Reinhardt <stever@eecs.umich.edu>
	Tue, 5 Sep 2006 00:14:07 +0000 (17:14 -0700)
committer	Steve Reinhardt <stever@eecs.umich.edu>
	Tue, 5 Sep 2006 00:14:07 +0000 (17:14 -0700)
commit	c39aea440c884f0abb29ecc2293fd6df608bc00c
tree	21642bd3db3f2e10989cb6c5cf34892b9efe6267	tree
parent	1233dbb9981ad27abeb22f9dcba20bd77abab041	commit \| diff

More Python hacking to deal with config.py split
and resulting recursive import trickiness.

--HG--
extra : convert_revision : 1ea93861eb8d260c9f3920dda0b8106db3e03705

35 files changed:

src/python/m5/SimObject.py		diff \| blob \| history
src/python/m5/__init__.py		diff \| blob \| history
src/python/m5/objects/AlphaConsole.py		diff \| blob \| history
src/python/m5/objects/AlphaTLB.py		diff \| blob \| history
src/python/m5/objects/BadDevice.py		diff \| blob \| history
src/python/m5/objects/BaseCPU.py		diff \| blob \| history
src/python/m5/objects/BaseCache.py		diff \| blob \| history
src/python/m5/objects/Bridge.py		diff \| blob \| history
src/python/m5/objects/Bus.py		diff \| blob \| history
src/python/m5/objects/CoherenceProtocol.py		diff \| blob \| history
src/python/m5/objects/Device.py		diff \| blob \| history
src/python/m5/objects/DiskImage.py		diff \| blob \| history
src/python/m5/objects/Ethernet.py		diff \| blob \| history
src/python/m5/objects/FUPool.py		diff \| blob \| history
src/python/m5/objects/FuncUnit.py		diff \| blob \| history
src/python/m5/objects/Ide.py		diff \| blob \| history
src/python/m5/objects/IntrControl.py		diff \| blob \| history
src/python/m5/objects/MemObject.py		diff \| blob \| history
src/python/m5/objects/MemTest.py		diff \| blob \| history
src/python/m5/objects/O3CPU.py		diff \| blob \| history
src/python/m5/objects/OzoneCPU.py		diff \| blob \| history
src/python/m5/objects/Pci.py		diff \| blob \| history
src/python/m5/objects/PhysicalMemory.py		diff \| blob \| history
src/python/m5/objects/Platform.py		diff \| blob \| history
src/python/m5/objects/Process.py		diff \| blob \| history
src/python/m5/objects/Repl.py		diff \| blob \| history
src/python/m5/objects/Root.py		diff \| blob \| history
src/python/m5/objects/SimConsole.py		diff \| blob \| history
src/python/m5/objects/SimpleDisk.py		diff \| blob \| history
src/python/m5/objects/SimpleOzoneCPU.py		diff \| blob \| history
src/python/m5/objects/System.py		diff \| blob \| history
src/python/m5/objects/Tsunami.py		diff \| blob \| history
src/python/m5/objects/Uart.py		diff \| blob \| history
src/python/m5/params.py		diff \| blob \| history
src/sim/main.cc		diff \| blob \| history

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