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(parent: f73caae) | patch
cpu: Fix coding style (byteEnable->byte_enable)
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 27 Nov 2019 15:48:22 +0000 (15:48 +0000)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 11 Dec 2019 15:07:52 +0000 (15:07 +0000)
commitc3bd8eb1214cbebbc92c7958b80aa06913bce3ba
tree6df53d30662ba49d93a1b90e3bfd1826bdb6726etree
parentf73caae20fed7b4500a724ac85c20b637ee353a1commit | diff
cpu: Fix coding style (byteEnable->byte_enable)

Change-Id: I2206559c6c2a6e6a0452e9c7d9964792afa9f358
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23282
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
16 files changed:
src/cpu/base_dyn_inst.hh diff | blob | history
src/cpu/checker/cpu.cc diff | blob | history
src/cpu/checker/cpu.hh diff | blob | history
src/cpu/exec_context.hh diff | blob | history
src/cpu/minor/exec_context.hh diff | blob | history
src/cpu/minor/lsq.cc diff | blob | history
src/cpu/minor/lsq.hh diff | blob | history
src/cpu/o3/cpu.hh diff | blob | history
src/cpu/o3/lsq.hh diff | blob | history
src/cpu/o3/lsq_impl.hh diff | blob | history
src/cpu/simple/atomic.cc diff | blob | history
src/cpu/simple/atomic.hh diff | blob | history
src/cpu/simple/base.hh diff | blob | history
src/cpu/simple/exec_context.hh diff | blob | history
src/cpu/simple/timing.cc diff | blob | history
src/cpu/simple/timing.hh diff | blob | history