soc: cores: fix name of EHXPLLL output clock in ECP5PLL
authorFrancis Lam <flam@alum.mit.edu>
Sun, 14 Jul 2019 19:27:28 +0000 (12:27 -0700)
committerFrancis Lam <flam@alum.mit.edu>
Sun, 14 Jul 2019 19:27:28 +0000 (12:27 -0700)
commitc6c743915acb309928dc2f267c8e324694a71feb
tree5457aa950b59753864e086bd76bfef77c6c2148b
parentd3aaaf5e6cb2f6a8cd8a7760979e6bddcc4edea1
soc: cores: fix name of EHXPLLL output clock in ECP5PLL
litex/soc/cores/clock.py