arch-gcn3: fix bug with DPP support
authorMatt Sinclair <Matthew.Sinclair@amd.com>
Wed, 27 Jun 2018 06:24:18 +0000 (02:24 -0400)
committerAnthony Gutierrez <anthony.gutierrez@amd.com>
Thu, 16 Jul 2020 20:37:22 +0000 (20:37 +0000)
commitc7b6e7c61377c8ebce8c82f518756d3d44a8380f
treea8812b02d8c6d7bb9ad1e26d4523df74cccdf4df
parented3135ea6a65b442628376f678fd9f6684921a22
arch-gcn3: fix bug with DPP support

Instructions that use the DPP field need to use the extra SRC0
register associated with the DPP instruction instead of the
"default" SRC0 register, since the default SRC0 register contains
the DPP information when DPP is being used.  This commit fixes
2735c3bb88 to take this into account.  Additionally, this commit
removes write of the src register from the DPP helper functions,
to avoid overwriting any changes made to the destination register.
Finally, this change modifies the instructions that use DPP to
simplify the flow through the execute() functions.

Change-Id: I80fd0af1f131f287f18ff73b3c1c9122d8c60823
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/29947
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Matt Sinclair <mattdsinclair@gmail.com>
src/arch/gcn3/insts/inst_util.hh
src/arch/gcn3/insts/instructions.cc