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(parent: 3c87290) | patch
back.pysim: delay clock processes by one half period.
authorwhitequark <cz@m-labs.hk>
Fri, 14 Dec 2018 05:17:43 +0000 (05:17 +0000)
committerwhitequark <cz@m-labs.hk>
Fri, 14 Dec 2018 05:17:43 +0000 (05:17 +0000)
commitc85382a022e0665c08d9e2d6f4fc29be39437afe
treebc12a249a1b846d0f4570d42fbaa5e8379e76a3ftree
parent3c8729024e0188b4959a7498ba3feb3c78b5a764commit | diff
back.pysim: delay clock processes by one half period.

Makes it easier to see initial delta cycles.
nmigen/back/pysim.py diff | blob | history