[PATCH] gdb-power10-single-step
authorWill Schmidt <will_schmidt@vnet.ibm.com>
Mon, 12 Apr 2021 19:11:02 +0000 (14:11 -0500)
committerWill Schmidt <will_schmidt@vnet.ibm.com>
Mon, 12 Apr 2021 19:11:02 +0000 (14:11 -0500)
commitc8a379440e0f8bf94ed5730e823c9256e64bf37c
tree60c862aedcb629281ae30b2598d1ace1156ab9e6
parente3d528d7e6a6b863d30aaecf74adf8c78286f84c
[PATCH] gdb-power10-single-step

Hi,
  This is based on a patch originally written by Alan Modra.
Powerpc / Power10 ISA 3.1 adds prefixed instructions, which
are 8 bytes in length.  This is in contrast to powerpc previously
always having 4 byte instruction length.  This patch implements
changes to allow GDB to better detect prefixed instructions, and
handle single stepping across the 8 byte instructions.

Added #defines to help test for PNOP and prefix instructions.
Update ppc_displaced_step_copy_insn() to handle pnop and prefixed
instructions whem R=0 (non-pc-relative).

Updated ppc_displaced_step_fixup() to properly handle the offset
value matching the current instruction size

Updated the for-loop within ppc_deal_with_atomic_sequence() to
count instructions properly in case we have a mix of 4-byte and
8-byte instructions within the atomic_sequence_length.

Added testcase and harness to exercise pc-relative load/store
instructions with R=0.

2021-04-12  Will Schmidt  <will_schmidt@vnet.ibm.com>

        gdb/ChangeLog:
        * rs6000-tdep.c:  Add support for single-stepping of
        prefixed instructions.

        gdb/testsuite/ChangeLog:
        * gdb.arch/powerpc-plxv-nonrel.s:  Testcase using
        non-relative plxv instructions.
        * gdb.arch/powerpc-plxv-nonrel.exp: Testcase harness.
gdb/ChangeLog
gdb/rs6000-tdep.c
gdb/testsuite/ChangeLog
gdb/testsuite/gdb.arch/powerpc-plxv-nonrel.exp [new file with mode: 0644]
gdb/testsuite/gdb.arch/powerpc-plxv-nonrel.s [new file with mode: 0644]