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(parent: ab230d1) | patch
sim: riscv: switch to new target-newlib-syscall
authorMike Frysinger <vapier@gentoo.org>
Sun, 28 Nov 2021 05:23:16 +0000 (00:23 -0500)
committerMike Frysinger <vapier@gentoo.org>
Sun, 28 Nov 2021 18:23:58 +0000 (13:23 -0500)
commitc8c6ef3807554a17d4518e45f91c53d17a71c083
treead91bd4587ccf247736aae694accac89b6b10c06tree
parentab230d13fc81986c4a74688e35510a8985dff422commit | diff
sim: riscv: switch to new target-newlib-syscall

Use the new target-newlib-syscall module.  This is needed to merge all
the architectures into a single build, and riscv has a custom syscall
table for its newlib/libgloss port.
sim/riscv/Makefile.in diff | blob | history
sim/riscv/interp.c diff | blob | history