intel/compiler: Fix src0/desc setter ordering
authorKenneth Graunke <kenneth@whitecape.org>
Mon, 26 Aug 2019 22:21:40 +0000 (15:21 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 27 Aug 2019 21:20:07 +0000 (14:20 -0700)
commitc8c9c4868429f98e77f782637568e9eed2dd33f9
tree76e5d8e1d927b7bc872a4979a2a4df65d6d882cd
parent360cf3c4b05679709574ef4d20b5097b0fd0be82
intel/compiler: Fix src0/desc setter ordering

src0 vstride and type overlap with bits of the extended descriptor.
brw_set_desc() also sets the extended descriptor to 0.  So by setting
the descriptor, then setting src0, we were accidentally setting a bunch
of extended descriptor bits unintentionally.

When using this infrastructure for framebuffer writes (in a future
patch), this ended up setting the extended descriptor bit 20, which is
"Null Render Target" on Icelake, causing nothing to be written to the
framebuffer.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/compiler/brw_eu_emit.c