projects / mesa.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: a447f9f) | patch
radv: fix CLEAR_STATE packet length.
authorDave Airlie <airlied@redhat.com>
Thu, 19 Oct 2017 03:52:29 +0000 (04:52 +0100)
committerDave Airlie <airlied@redhat.com>
Thu, 19 Oct 2017 22:56:48 +0000 (23:56 +0100)
commitc8eb3558cc246ecd053ff50191f94f1535013688
treee8a0f3e1e4a01628928262536f08aa7908e28830tree
parenta447f9fe7b7902db6f91bd4b24adb4ddfad4b10bcommit | diff
radv: fix CLEAR_STATE packet length.

Looking at shader traces I noticed some registers were missing,
one of them was being eaten by the wrong clear state length.

Fixes: 4f42ea4dc (radv: use CLEAR_STATE for initializing some registers)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
src/amd/vulkan/si_cmd_buffer.c diff | blob | history